I’d like to raise awareness of the release of OpenCPI support for the Xilinx RF Data Converter on the HiTech Global ZRF8 platform. This code should be considered a tech preview as it will likely undergo changes as the OpenCPI maintainers integrate into their baseline. A diagram of the software and FPGA support stack is seen here: https://github.com/davis-hoover/ocpi.osp.hitech-global/blob/v1.0.0_opencpi_rfdc/hdl/devices/drc.rcc/drc-worker.rst. The opencpi.git changes have been forked here: https://github.com/davis-hoover/opencpi/tree/rfdc This release contains working examples for the Xilinx RF Data Converter with RF-in-the-loop applications as well as integration with AXI-Stream and AXI-Lite interfaces on Xilinx FPGA IP and software libraries. A significant effort went into making Xilinx designs map to the standard OpenCPI control plane. An architecture is employed that is similar to the existing OpenCPI AD9361 transceiver support stack. Notable additions are as described below: * new opencpi.git rfdc software library prerequisite * new ocpi.osp.hitech-global.git rfdc HDL primitive which wraps the Xilinx RF Data Converter * new ocpi.osp.hitech-global.git rfdc HDL device workers which expose RF Data Converter interfaces as OpenCPI data/control planes * new ocpi.osp.hitech-global.git drc.rcc worker with significant DRC codebase improvements (“out-of-tree” drc/ codebase, i.e., within worker directory) * new ocpi.osp.hitech-global.git HDL assemblies and applications which serve as fs/4 RF-in-the-loop tests Very best, - Davis