I have run into a few times when I've gone to try to build an FPGA, and the supporting worker configuration has not previously been built. Just recently, it seemed I was unaware I had to apply timing constraints to an internal worker pin versus just the external pins. I admit, most of my FPGA work has been done with all/mostly source and not many EDIF netlists stitched together, but it seems to me to be successful the worker constraints need to somehow come along for the ride and not be up to the assembly to instantiate. When updating to a new version of OpenCPI, I often take many hours to build for arm, aarch64, zynq, and zynq_ultra for the 2 platforms I am currently working on. This is a lot of overhead just to build the few applications I want for my small development. Is there a plan in the future to build workers lazily so building the core/assets projects prior to building the target application itself isn't required? I'd also be interested in assemblies that are strictly projects with generated source code and no EDIF netlists. Is this on the roadmap at any point? I know I asked this previously, but it seems like such an important feature, I would like to see it implemented sooner rather than later. Thanks, Brian