There is early/preliiminary work in this area that is not on github, but
probably could be.
In case you don't already know, the Arria10 has a major issue in that it
requires a partial reconfiguration FPGA flow in order to do dynamic
bitstream loading.
The Arria5 SoC does not have this issue and thus would be much easier to
succeed with.
Generically supporting partial reconfiguration is an OpenCPI roadmap
item, but won't happen in the short term.
Jim
On 6/3/19 4:17 PM, Josh Schindehette wrote:
My team is interested in Intel's Arria10 SoC Development Kit and Quartus
Prime Pro in OpenCPI. Is there an existing HW and/or SW BSP for this
development kit? If so, can it be (or is it already) released open-source
even if in an untested or unsupported capacity?
Thanks!
Josh Schindehette
There is early/preliiminary work in this area that is not on github, but
probably could be.
In case you don't already know, the Arria10 has a major issue in that it
requires a partial reconfiguration FPGA flow in order to do dynamic
bitstream loading.
The Arria5 SoC does not have this issue and thus would be much easier to
succeed with.
Generically supporting partial reconfiguration is an OpenCPI roadmap
item, but won't happen in the short term.
Jim
On 6/3/19 4:17 PM, Josh Schindehette wrote:
> My team is interested in Intel's Arria10 SoC Development Kit and Quartus
> Prime Pro in OpenCPI. Is there an existing HW and/or SW BSP for this
> development kit? If so, can it be (or is it already) released open-source
> even if in an untested or unsupported capacity?
>
> Thanks!
> Josh Schindehette
>
