Are there plans to have the Virtex 7 supported in the list of HDL Targets for either the VC707 or VC709 dev boards? Thanks, Roy.

Hi Roy, That part is not on any high priority hit list I have heard about, but dealing with the part(s) itself is pretty simple, but it gets more complicated depending what other devices the platform needs to support connected to the FPGA. I.e. supporting one of the dev boards, without supporting any additional devices or DRAM, is not too challenging. One challenge for these boards is bringing up the PCI infrastructure, with "modern" Xilinx IP. It has been done in some experimental projects, but that support is also not yet mainstreamed, and thus is not too easy for someone new to OpenCPI. If we (or anyone) were to attack one of these dev boards, which one would you prefer, and what other FPGA-attached devices would be high priority or critical? Cheers, Jim On 2/18/20 5:55 PM, Doeve, Roy [USA] wrote: > Are there plans to have the Virtex 7 supported in the list of HDL Targets for either the VC707 or VC709 dev boards? > > Thanks, > Roy. > >