I am looking at the different tests for OpenCPI v2.0 when working with the AD9361, and I am curious if the ad9361_adc_test and ad9361_dac_test will continue to be updated, or if the data_src_qadc_test_app and data_sink_qdac_test_app will take over? Should I stick with trying to maintain/support my port of the ad9361_adc/dac_test for other platforms, or stick with the data_src_qadc_test and data_sink_qdac_test_app? Thanks, Brian

Stick with data_src_qadc_test and data_sink_qdac_test apps as they will take over previous tests. Aaron On Mon, Oct 19, 2020 at 1:31 PM Brian Padalino <bpadalino@gmail.com> wrote: > I am looking at the different tests for OpenCPI v2.0 when working with the > AD9361, and I am curious if the ad9361_adc_test and ad9361_dac_test will > continue to be updated, or if the data_src_qadc_test_app and > data_sink_qdac_test_app will take over? > > Should I stick with trying to maintain/support my port of the > ad9361_adc/dac_test for other platforms, or stick with the > data_src_qadc_test and data_sink_qdac_test_app? > > Thanks, > Brian >

I am in the process of porting these tests over, and I am switching the devices in my platform to be the platform_* devices that I see in the examples, but I am running into a problem regarding a signal called on_off0 with regards to the data_sink_qdac_ad9361_sub. It seems there is some connection made in an HdlContainer, but I do not have optional ad9361's on cards, instead they are always present in the platform. So when I try to build my platform, I get the following error: ERROR: [Synth 8-1031] afe0_dac_sub_on_off0_clk is not declared [/path/to/config-single0/gen/single0-assy.vhd:453] ERROR: [Synth 8-1031] afe0_dac_sub_on_off1_clk is not declared [/path/to/config-single0/gen/single0-assy.vhd:462] Can someone explain what this on_off0/1_clk signal is used for? Is it necessary? Are there ways around it if I don't need it? Thanks, Brian On Mon, Oct 19, 2020 at 2:55 PM Aaron Olivarez <aaron@olivarez.info> wrote: > Stick with data_src_qadc_test and data_sink_qdac_test apps as they will > take over previous tests. > > Aaron > > On Mon, Oct 19, 2020 at 1:31 PM Brian Padalino <bpadalino@gmail.com> > wrote: > >> I am looking at the different tests for OpenCPI v2.0 when working with the >> AD9361, and I am curious if the ad9361_adc_test and ad9361_dac_test will >> continue to be updated, or if the data_src_qadc_test_app and >> data_sink_qdac_test_app will take over? >> >> Should I stick with trying to maintain/support my port of the >> ad9361_adc/dac_test for other platforms, or stick with the >> data_src_qadc_test and data_sink_qdac_test_app? >> >> Thanks, >> Brian >>

ERROR: [Synth 8-1031] afe0_dac_sub_on_off0_clk is not declared

The ad9361_dac_sub worker is the part of the ad9361 support system that deals with the two dac output channel data paths, and each channel has a control port (no data) to dynamically turn it off and on. Hence off0 and off1 are ports (without data) for that purpose.  Those ports have clock inputs, meaning they accept the clock from whatever they are connected to. This error looks like the clock inputs are not connected in the config assembly for some reason. The on_off0 and on_off1 ports of the data_sink_qdac_ad9361_sub are optional, per the XML, so they should not need to be connected. I assume you are not connecting them. Can you post that generated file?, along with the corresponding -defs.vhd file? Which (device) workers are you including in your platform configuration XML? Jim On 10/22/20 3:13 PM, Brian Padalino wrote: > I am in the process of porting these tests over, and I am switching the > devices in my platform to be the platform_* devices that I see in the > examples, but I am running into a problem regarding a signal called on_off0 > with regards to the data_sink_qdac_ad9361_sub. > > It seems there is some connection made in an HdlContainer, but I do not > have optional ad9361's on cards, instead they are always present in the > platform. So when I try to build my platform, I get the following error: > > ERROR: [Synth 8-1031] afe0_dac_sub_on_off0_clk is not declared > [/path/to/config-single0/gen/single0-assy.vhd:453] > ERROR: [Synth 8-1031] afe0_dac_sub_on_off1_clk is not declared > [/path/to/config-single0/gen/single0-assy.vhd:462] > > Can someone explain what this on_off0/1_clk signal is used for? Is it > necessary? Are there ways around it if I don't need it? > > Thanks, > Brian > > On Mon, Oct 19, 2020 at 2:55 PM Aaron Olivarez <aaron@olivarez.info> wrote: > >> Stick with data_src_qadc_test and data_sink_qdac_test apps as they will >> take over previous tests. >> >> Aaron >> >> On Mon, Oct 19, 2020 at 1:31 PM Brian Padalino <bpadalino@gmail.com> >> wrote: >> >>> I am looking at the different tests for OpenCPI v2.0 when working with the >>> AD9361, and I am curious if the ad9361_adc_test and ad9361_dac_test will >>> continue to be updated, or if the data_src_qadc_test_app and >>> data_sink_qdac_test_app will take over? >>> >>> Should I stick with trying to maintain/support my port of the >>> ad9361_adc/dac_test for other platforms, or stick with the >>> data_src_qadc_test and data_sink_qdac_test_app? >>> >>> Thanks, >>> Brian >>>