v2.1.0-rc.1 failing on zed due to outdated clock constraint
All,
As a result of reorganizing the Zynq PS primitive to consolidate the PS and SDP, the zed.xdc clock constraint was missing an update. The proper fix is provided below:
FROM:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps//PS7_i/FCLKCLK[0]}]
TO:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps/ps/PS7_i/FCLKCLK[0]}]
I've confirmed that this change allows the assets/{fir_real_sse.test and fir_complex_sse.test} to pass on the Zedboard, and I expect it will resolve the other CompUnitTest issues that are failing with RC1, but were passing for BETA.
Do you have an ETA on when RC2 will be released?
Thanks,
Adam
Thanks a lot Adam.
Looks like we'll have to make these changes to other constraint files as well.
RC2 is slated for this Friday.
Regards,
Jerry
From: discuss discuss-bounces@lists.opencpi.org on behalf of Adam Ponchak aponchak@geontech.onmicrosoft.com
Sent: Thursday, March 4, 2021 2:10 PM
To: discuss@lists.opencpi.org discuss@lists.opencpi.org
Subject: [Discuss OpenCPI] v2.1.0-rc.1 failing on zed due to outdated clock constraint
All,
As a result of reorganizing the Zynq PS primitive to consolidate the PS and SDP, the zed.xdc clock constraint was missing an update. The proper fix is provided below:
FROM:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps//PS7_i/FCLKCLK[0]}]
TO:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps/ps/PS7_i/FCLKCLK[0]}]
I've confirmed that this change allows the assets/{fir_real_sse.test and fir_complex_sse.test} to pass on the Zedboard, and I expect it will resolve the other CompUnitTest issues that are failing with RC1, but were passing for BETA.
Do you have an ETA on when RC2 will be released?
Thanks,
Adam
This also impacts the XDC files used in various assembly directories, for example
assets/hdl/assemblies/fsk_modem/cnt_zed_fmcomms_2_3_scdcd.xdc -> ../data_sink_qdac_test_asm/cnt_zed_fmcomms_2_3_scdcd.xdc
From: Jerry Darko jerry.darko@cnftech.com
Sent: 04 March 2021 14:43
To: Adam Ponchak aponchak@geontech.onmicrosoft.com; discuss@lists.opencpi.org discuss@lists.opencpi.org
Subject: Re: v2.1.0-rc.1 failing on zed due to outdated clock constraint
Thanks a lot Adam.
Looks like we'll have to make these changes to other constraint files as well.
RC2 is slated for this Friday.
Regards,
Jerry
From: discuss discuss-bounces@lists.opencpi.org on behalf of Adam Ponchak aponchak@geontech.onmicrosoft.com
Sent: Thursday, March 4, 2021 2:10 PM
To: discuss@lists.opencpi.org discuss@lists.opencpi.org
Subject: [Discuss OpenCPI] v2.1.0-rc.1 failing on zed due to outdated clock constraint
All,
As a result of reorganizing the Zynq PS primitive to consolidate the PS and SDP, the zed.xdc clock constraint was missing an update. The proper fix is provided below:
FROM:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps//PS7_i/FCLKCLK[0]}]
TO:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps/ps/PS7_i/FCLKCLK[0]}]
I've confirmed that this change allows the assets/{fir_real_sse.test and fir_complex_sse.test} to pass on the Zedboard, and I expect it will resolve the other CompUnitTest issues that are failing with RC1, but were passing for BETA.
Do you have an ETA on when RC2 will be released?
Thanks,
Adam
Yes, agreed.
From: Adam Ponchak aponchak@geontech.onmicrosoft.com
Sent: Thursday, March 4, 2021 5:01 PM
To: Jerry Darko jerry.darko@cnftech.com; discuss@lists.opencpi.org discuss@lists.opencpi.org
Subject: Re: v2.1.0-rc.1 failing on zed due to outdated clock constraint
This also impacts the XDC files used in various assembly directories, for example
assets/hdl/assemblies/fsk_modem/cnt_zed_fmcomms_2_3_scdcd.xdc -> ../data_sink_qdac_test_asm/cnt_zed_fmcomms_2_3_scdcd.xdc
From: Jerry Darko jerry.darko@cnftech.com
Sent: 04 March 2021 14:43
To: Adam Ponchak aponchak@geontech.onmicrosoft.com; discuss@lists.opencpi.org discuss@lists.opencpi.org
Subject: Re: v2.1.0-rc.1 failing on zed due to outdated clock constraint
Thanks a lot Adam.
Looks like we'll have to make these changes to other constraint files as well.
RC2 is slated for this Friday.
Regards,
Jerry
From: discuss discuss-bounces@lists.opencpi.org on behalf of Adam Ponchak aponchak@geontech.onmicrosoft.com
Sent: Thursday, March 4, 2021 2:10 PM
To: discuss@lists.opencpi.org discuss@lists.opencpi.org
Subject: [Discuss OpenCPI] v2.1.0-rc.1 failing on zed due to outdated clock constraint
All,
As a result of reorganizing the Zynq PS primitive to consolidate the PS and SDP, the zed.xdc clock constraint was missing an update. The proper fix is provided below:
FROM:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps//PS7_i/FCLKCLK[0]}]
TO:
create_clock -name clk_fpga_0 -period 10.000 [get_pins {ftop/pfconfig_i/zed_i/worker/ps/ps/ps/PS7_i/FCLKCLK[0]}]
I've confirmed that this change allows the assets/{fir_real_sse.test and fir_complex_sse.test} to pass on the Zedboard, and I expect it will resolve the other CompUnitTest issues that are failing with RC1, but were passing for BETA.
Do you have an ETA on when RC2 will be released?
Thanks,
Adam