CLASSIFICATION: UNCLASSIFIED
How does OpenCPI handle interrupts fron the PL to the PS via the GIC?
Can I still use the INT pin on the PS?
How do I write the work.xml to indicate an interrupt signal?
Rasheed
CLASSIFICATION: UNCLASSIFIED
With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something you
cannot achieve with the interfaces provided?
On 4/11/19 10:01 AM, Weusi-Akinwande, Rasheed D CTR (USA) via discuss wrote:
CLASSIFICATION: UNCLASSIFIED
How does OpenCPI handle interrupts fron the PL to the PS via the GIC?
Can I still use the INT pin on the PS?
How do I write the work.xml to indicate an interrupt signal?
Rasheed
CLASSIFICATION: UNCLASSIFIED
CLASSIFICATION: UNCLASSIFIED
Yes an Application I was porting used the interrupt (GIC) to handle timing and
data transfers
-----Original Message-----
From: discuss [mailto:discuss-bounces@lists.opencpi.org] On Behalf Of James
Kulp
Sent: Thursday, April 11, 2019 10:20 AM
To: discuss@lists.opencpi.org
Subject: [Non-DoD Source] Re: [Discuss OpenCPI] GIC on the PS (UNCLASSIFIED)
All active links contained in this email were disabled. Please verify the
identity of the sender, and confirm the authenticity of all links contained
within the message prior to copying and pasting the address to a Web browser.
With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something you
cannot achieve with the interfaces provided?
On 4/11/19 10:01 AM, Weusi-Akinwande, Rasheed D CTR (USA) via discuss wrote:
CLASSIFICATION: UNCLASSIFIED
How does OpenCPI handle interrupts fron the PL to the PS via the GIC?
Can I still use the INT pin on the PS?
How do I write the work.xml to indicate an interrupt signal?
Rasheed
CLASSIFICATION: UNCLASSIFIED
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Before I eliminate the possibility of using OpenCPI completely.
Can the PS write to the DDR3 in openCPI?
[With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something you
cannot achieve with the interfaces provided? ]
I understand that is does not support IRQ. But for clarification, can OpenCPI
support interrupts and DDR3 memory? Ie drivers?
-----Original Message-----
From: discuss [mailto:discuss-bounces@lists.opencpi.org] On Behalf Of James
Kulp
Sent: Thursday, April 11, 2019 10:20 AM
To: discuss@lists.opencpi.org
Subject: [Non-DoD Source] Re: [Discuss OpenCPI] GIC on the PS (UNCLASSIFIED)
All active links contained in this email were disabled. Please verify the
identity of the sender, and confirm the authenticity of all links contained
within the message prior to copying and pasting the address to a Web browser.
With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something you
cannot achieve with the interfaces provided?
On 4/11/19 10:01 AM, Weusi-Akinwande, Rasheed D CTR (USA) via discuss wrote:
CLASSIFICATION: UNCLASSIFIED
How does OpenCPI handle interrupts fron the PL to the PS via the GIC?
Can I still use the INT pin on the PS?
How do I write the work.xml to indicate an interrupt signal?
Rasheed
CLASSIFICATION: UNCLASSIFIED
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CLASSIFICATION: UNCLASSIFIED
Hi Rasheed,
Using OpenCPI normally means using the infrastructure that is there,
which provides control and data flow between components in a
heterogeneous system.
Interrupts are an infrastructure detail far below what an "application"
would want, even on an FPGA, so perhaps we are simply using the term
"application" differently.
In the Zynq implementation of OpenCPI, data flow between PS and PL is
implemented using the AXI-HP hardware streaming channels which perform
DMA to and from the PS DRAM.
All four such channels are used for streams, and when there are more
than 4 streams they then multiplexed onto those 4 hardware channels.
OpenCPI generally uses this sort of DMA model where the FPGA performs
bus-mastering memory accesses like normal DMA peripherals. PCIE-based
systems work similarly.
Hope that clarifies things a bit more.
Cheers,
Jim
On 4/17/19 4:25 PM, Weusi-Akinwande, Rasheed D CTR (USA) wrote:
CLASSIFICATION: UNCLASSIFIED
Before I eliminate the possibility of using OpenCPI completely.
Can the PS write to the DDR3 in openCPI?
[With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something you
cannot achieve with the interfaces provided? ]
I understand that is does not support IRQ. But for clarification, can OpenCPI
support interrupts and DDR3 memory? Ie drivers?
-----Original Message-----
From: discuss [mailto:discuss-bounces@lists.opencpi.org] On Behalf Of James
Kulp
Sent: Thursday, April 11, 2019 10:20 AM
To: discuss@lists.opencpi.org
Subject: [Non-DoD Source] Re: [Discuss OpenCPI] GIC on the PS (UNCLASSIFIED)
All active links contained in this email were disabled. Please verify the
identity of the sender, and confirm the authenticity of all links contained
within the message prior to copying and pasting the address to a Web browser.
With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something you
cannot achieve with the interfaces provided?
On 4/11/19 10:01 AM, Weusi-Akinwande, Rasheed D CTR (USA) via discuss wrote:
CLASSIFICATION: UNCLASSIFIED
How does OpenCPI handle interrupts fron the PL to the PS via the GIC?
Can I still use the INT pin on the PS?
How do I write the work.xml to indicate an interrupt signal?
Rasheed
CLASSIFICATION: UNCLASSIFIED
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discuss mailing list
discuss@lists.opencpi.org
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discuss mailing list
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CLASSIFICATION: UNCLASSIFIED
CLASSIFICATION: UNCLASSIFIED
A little.
I have a non-OpenCPI application/code that uses interrupts as time keeper for
example(1 use). I was asking if I could port the code to OpenCPI and still
have the
Interrupts function like before.
Rasheed
-----Original Message-----
From: James Kulp [mailto:jek@parera.com]
Sent: Wednesday, April 17, 2019 4:46 PM
To: Weusi-Akinwande, Rasheed D CTR (USA)
rasheed.d.weusi-akinwande.ctr@mail.mil; discuss@lists.opencpi.org
Subject: Re: [Non-DoD Source] Re: [Discuss OpenCPI] GIC on the PS
(UNCLASSIFIED)
Hi Rasheed,
Using OpenCPI normally means using the infrastructure that is there, which
provides control and data flow between components in a heterogeneous system.
Interrupts are an infrastructure detail far below what an "application"
would want, even on an FPGA, so perhaps we are simply using the term
"application" differently.
In the Zynq implementation of OpenCPI, data flow between PS and PL is
implemented using the AXI-HP hardware streaming channels which perform DMA to
and from the PS DRAM.
All four such channels are used for streams, and when there are more than 4
streams they then multiplexed onto those 4 hardware channels.
OpenCPI generally uses this sort of DMA model where the FPGA performs
bus-mastering memory accesses like normal DMA peripherals. PCIE-based systems
work similarly.
Hope that clarifies things a bit more.
Cheers,
Jim
On 4/17/19 4:25 PM, Weusi-Akinwande, Rasheed D CTR (USA) wrote:
CLASSIFICATION: UNCLASSIFIED
Before I eliminate the possibility of using OpenCPI completely.
Can the PS write to the DDR3 in openCPI?
[With OpenCPI all communications between PS and PL on Zynq uses the
AXI interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something
you cannot achieve with the interfaces provided? ]
I understand that is does not support IRQ. But for clarification, can
OpenCPI support interrupts and DDR3 memory? Ie drivers?
-----Original Message-----
From: discuss [mailto:discuss-bounces@lists.opencpi.org] On Behalf Of
James Kulp
Sent: Thursday, April 11, 2019 10:20 AM
To: discuss@lists.opencpi.org
Subject: [Non-DoD Source] Re: [Discuss OpenCPI] GIC on the PS
(UNCLASSIFIED)
All active links contained in this email were disabled. Please verify
the identity of the sender, and confirm the authenticity of all links
contained within the message prior to copying and pasting the address to a
Web browser.
With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something
you cannot achieve with the interfaces provided?
On 4/11/19 10:01 AM, Weusi-Akinwande, Rasheed D CTR (USA) via discuss wrote:
CLASSIFICATION: UNCLASSIFIED
How does OpenCPI handle interrupts fron the PL to the PS via the GIC?
Can I still use the INT pin on the PS?
How do I write the work.xml to indicate an interrupt signal?
Rasheed
CLASSIFICATION: UNCLASSIFIED
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CLASSIFICATION: UNCLASSIFIED
CLASSIFICATION: UNCLASSIFIED
If the interrupts are used to signal from a component on the FPGA to a
(software) component in the processor, an alternative in OpenCPI would
be to use port-to-port communications using small messages.
But there is no support in OpenCPI for using the actual hardware
interrupt mechanism.
Unless there are specific latency constraints that require that exact
mechanism, using normal messaging to communicate "events" may satisfy
your requirement.
Porting any application into a component-based environment normally
involves creating components and defining the communications between them.
So recasting an interrupt path into a messaging path would normally be
required.
Jim
On 4/18/19 9:07 AM, Weusi-Akinwande, Rasheed D CTR (USA) wrote:
CLASSIFICATION: UNCLASSIFIED
A little.
I have a non-OpenCPI application/code that uses interrupts as time keeper for
example(1 use). I was asking if I could port the code to OpenCPI and still
have the
Interrupts function like before.
Rasheed
-----Original Message-----
From: James Kulp [mailto:jek@parera.com]
Sent: Wednesday, April 17, 2019 4:46 PM
To: Weusi-Akinwande, Rasheed D CTR (USA)
rasheed.d.weusi-akinwande.ctr@mail.mil; discuss@lists.opencpi.org
Subject: Re: [Non-DoD Source] Re: [Discuss OpenCPI] GIC on the PS
(UNCLASSIFIED)
Hi Rasheed,
Using OpenCPI normally means using the infrastructure that is there, which
provides control and data flow between components in a heterogeneous system.
Interrupts are an infrastructure detail far below what an "application"
would want, even on an FPGA, so perhaps we are simply using the term
"application" differently.
In the Zynq implementation of OpenCPI, data flow between PS and PL is
implemented using the AXI-HP hardware streaming channels which perform DMA to
and from the PS DRAM.
All four such channels are used for streams, and when there are more than 4
streams they then multiplexed onto those 4 hardware channels.
OpenCPI generally uses this sort of DMA model where the FPGA performs
bus-mastering memory accesses like normal DMA peripherals. PCIE-based systems
work similarly.
Hope that clarifies things a bit more.
Cheers,
Jim
On 4/17/19 4:25 PM, Weusi-Akinwande, Rasheed D CTR (USA) wrote:
CLASSIFICATION: UNCLASSIFIED
Before I eliminate the possibility of using OpenCPI completely.
Can the PS write to the DDR3 in openCPI?
[With OpenCPI all communications between PS and PL on Zynq uses the
AXI interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something
you cannot achieve with the interfaces provided? ]
I understand that is does not support IRQ. But for clarification, can
OpenCPI support interrupts and DDR3 memory? Ie drivers?
-----Original Message-----
From: discuss [mailto:discuss-bounces@lists.opencpi.org] On Behalf Of
James Kulp
Sent: Thursday, April 11, 2019 10:20 AM
To: discuss@lists.opencpi.org
Subject: [Non-DoD Source] Re: [Discuss OpenCPI] GIC on the PS
(UNCLASSIFIED)
All active links contained in this email were disabled. Please verify
the identity of the sender, and confirm the authenticity of all links
contained within the message prior to copying and pasting the address to a
Web browser.
With OpenCPI all communications between PS and PL on Zynq uses the AXI
interfaces (GP and HP) and no other signals.
There is no support for any other PS/PL signals. Is there something
you cannot achieve with the interfaces provided?
On 4/11/19 10:01 AM, Weusi-Akinwande, Rasheed D CTR (USA) via discuss wrote:
CLASSIFICATION: UNCLASSIFIED
How does OpenCPI handle interrupts fron the PL to the PS via the GIC?
Can I still use the INT pin on the PS?
How do I write the work.xml to indicate an interrupt signal?
Rasheed
CLASSIFICATION: UNCLASSIFIED
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