On Wed, Jan 8, 2020 at 2:29 PM Davis Hoover dhoover@geontech.com wrote:

I am trying to use the matchstiq_z1 as a reference in the github repo here:

https://github.com/opencpi/opencpi/tree/master/projects/assets/hdl/platforms/matchstiq_z1

And I am failing to see if the XDC files are associated with any of the
platform configs there?  I don't think I see it?

How can I explicitly have an HdlConfig reference the constraints?

This is exactly what I needed to see.  Thank you!

Also, just to be sure, leaving the platform='' should get rid of the signal
in the top level, correct?

Thanks,
Brian

The matchstiq doesn't really have the proper device-specific constraints
implemented anywhere, and relies on the same .xdc file for all of its pf
configs. Either the E310 or the Zedboard/FMCOMMS is the closest to what
you're looking for - each has a platform config which references a
constraints file:
https://github.com/opencpi/opencpi/tree/master/projects/assets/hdl/platforms/zed

And yes, leaving the platform='' gets rid of the signal in the top level.

On Wed, Jan 8, 2020 at 2:39 PM Brian Padalino bpadalino@gmail.com wrote:

On Wed, Jan 8, 2020 at 3:12 PM Davis Hoover dhoover@geontech.com wrote:

Perfect - thank you.

I'm currently struggling mapping the P0_D_11_6 and P0_D_5_0 ports of the
ad9361 to tx_data_out(11 downto 0) and rx_data_in(11 downto 0).

I currently have the mapping as such:

<signal name="P0_D_5_0(0)"  platform="tx_data_out(0)"/>
<signal name="P0_D_5_0(1)"  platform="tx_data_out(1)"/>
<signal name="P0_D_5_0(2)"  platform="tx_data_out(2)"/>
<signal name="P0_D_5_0(3)"  platform="tx_data_out(3)"/>
<signal name="P0_D_5_0(4)"  platform="tx_data_out(4)"/>
<signal name="P0_D_5_0(5)"  platform="tx_data_out(5)"/>
<signal name="P0_D_11_6(0)" platform="tx_data_out(6)"/>
<signal name="P0_D_11_6(1)" platform="tx_data_out(7)"/>
<signal name="P0_D_11_6(2)" platform="tx_data_out(8)"/>
<signal name="P0_D_11_6(3)" platform="tx_data_out(9)"/>
<signal name="P0_D_11_6(4)" platform="tx_data_out(10)"/>
<signal name="P0_D_11_6(5)" platform="tx_data_out(11)"/>

Outside the device definition, I've placed:

I've created a pretty simple container with the following configuration:

And an empty assembly.

When I try to build, I get the following error:

For file gen/empty_pluto_pluto_txrx_pluto_txrx_container.xml: in
HdlContainerAssembly for empty_pluto_pluto_txrx_pluto_txrx_container:
External signal "tx_data_out(6)" specified for signal
"ad9361_data_sub_P0_D_11_6(0)" of instance "pfconfig" of worker
"pluto_txrx" is not an external signal of the assembly

Does the platform reassignment need to be to a single signal and not an
array?

Thanks,
Brian

This "is not an external signal of the assembly" error is a bit cryptic and
something I would have to re-create locally to fully understand. You may be
on the right path w/ single signal and not an array for the value in
platform='value(index)' - can you try that and get back to me? If that
doesn't work I'll try to recreate.

---------- Forwarded message ---------
From: Brian Padalino bpadalino@gmail.com
Date: Wed, Jan 8, 2020 at 4:48 PM
Subject: Re: [Discuss OpenCPI] Platform Mapping HDL Pins
To: Davis Hoover dhoover@geontech.com
Cc: discuss@lists.opencpi.org

On Wed, Jan 8, 2020 at 3:12 PM Davis Hoover dhoover@geontech.com wrote:

Perfect - thank you.

I'm currently struggling mapping the P0_D_11_6 and P0_D_5_0 ports of the
ad9361 to tx_data_out(11 downto 0) and rx_data_in(11 downto 0).

I currently have the mapping as such:

<signal name="P0_D_5_0(0)"  platform="tx_data_out(0)"/>
<signal name="P0_D_5_0(1)"  platform="tx_data_out(1)"/>
<signal name="P0_D_5_0(2)"  platform="tx_data_out(2)"/>
<signal name="P0_D_5_0(3)"  platform="tx_data_out(3)"/>
<signal name="P0_D_5_0(4)"  platform="tx_data_out(4)"/>
<signal name="P0_D_5_0(5)"  platform="tx_data_out(5)"/>
<signal name="P0_D_11_6(0)" platform="tx_data_out(6)"/>
<signal name="P0_D_11_6(1)" platform="tx_data_out(7)"/>
<signal name="P0_D_11_6(2)" platform="tx_data_out(8)"/>
<signal name="P0_D_11_6(3)" platform="tx_data_out(9)"/>
<signal name="P0_D_11_6(4)" platform="tx_data_out(10)"/>
<signal name="P0_D_11_6(5)" platform="tx_data_out(11)"/>

Outside the device definition, I've placed:

I've created a pretty simple container with the following configuration:

And an empty assembly.

When I try to build, I get the following error:

For file gen/empty_pluto_pluto_txrx_pluto_txrx_container.xml: in
HdlContainerAssembly for empty_pluto_pluto_txrx_pluto_txrx_container:
External signal "tx_data_out(6)" specified for signal
"ad9361_data_sub_P0_D_11_6(0)" of instance "pfconfig" of worker
"pluto_txrx" is not an external signal of the assembly

Does the platform reassignment need to be to a single signal and not an
array?

Thanks,
Brian

On Wed, Jan 8, 2020 at 4:48 PM Brian Padalino bpadalino@gmail.com wrote:

I got around this issue by not using an array for the output, and changing
the XDC file.

However, I get an issue with multiple drivers on the platform nets that I
am mapping to.  It seems that the port map for the specific configuration I
have has in the txrx-impl.vhd file lists both the platform signal and the
specific device signal.

When I put it into an assembly, the port mapping will go something like
this:

spi_mosi => spi_mosi,
...
ad9361_spi_SPI_DI => spi_mosi,
...

So the output spi_mosi is being driven by 2 sources, which isn't right at
all.  I can post my HdlPlatform if it helps?

If I map my platform => platform signals to platform => open instead, then
things work as I expect.

I am guessing it isn't expected that the platform signal should be listed
in the txrx-impl.vhd file for my platform top level?  Is that true?

Thanks,
Brian

From previous discussion you said " I was declaring a signal outside of the
device, which seems incorrect.  The platform attribute in the device
element inside the HdlPlatform node is the only thing required to perform
the mapping." which led me to believe you removed the spi_mosi platform
signal?

---------- Forwarded message ---------
From: Brian Padalino bpadalino@gmail.com
Date: Thu, Jan 9, 2020 at 11:44 AM
Subject: Re: [Discuss OpenCPI] Platform Mapping HDL Pins
To: Davis Hoover dhoover@geontech.com
Cc: discuss@lists.opencpi.org

On Wed, Jan 8, 2020 at 4:48 PM Brian Padalino bpadalino@gmail.com wrote:

I got around this issue by not using an array for the output, and changing
the XDC file.

However, I get an issue with multiple drivers on the platform nets that I
am mapping to.  It seems that the port map for the specific configuration I
have has in the txrx-impl.vhd file lists both the platform signal and the
specific device signal.

When I put it into an assembly, the port mapping will go something like
this:

spi_mosi => spi_mosi,
...
ad9361_spi_SPI_DI => spi_mosi,
...

So the output spi_mosi is being driven by 2 sources, which isn't right at
all.  I can post my HdlPlatform if it helps?

If I map my platform => platform signals to platform => open instead, then
things work as I expect.

I am guessing it isn't expected that the platform signal should be listed
in the txrx-impl.vhd file for my platform top level?  Is that true?

Thanks,
Brian

On Thu, Jan 9, 2020 at 12:34 PM Davis Hoover dhoover@geontech.com wrote:

I remember going back and forth, and I couldn't figure out why.  I created
the signal in the platform because I kept getting this error in my empty
assembly when I didn't:

For file gen/empty_pluto_txrx_container.xml: in HdlContainerAssembly for
empty_pluto_txrx_container: External signal "spi_mosi" specified for signal
"ad9361_spi_SPI_DI" of instance "pfconfig" of worker "txrx" is not an
external signal of the assembly

My container is very simple for this:

Do I somehow need the container and/or the assembly to declare the same
signals that I told the platform would be there for mapping?

Thanks,
Brian

On Thu, Jan 9, 2020 at 3:47 PM Brian Padalino bpadalino@gmail.com wrote:

After a long and arduous ordeal, the solution to this is to declare the
signal outside of the device, and map the device signal to the platform.
Both are required to make it all work out.

Care should be taken not to assign those signals in the VHDL source file
associated with the platform.  I believe what happens in the instantiations
is that the spi_mosi => spi_mosi mapping ends up being undriven, and
therefore isn't a problem.

I had assigned spi_mosi in my platform VHDL file when I shouldn't have.
Now everything, I believe, appears to build and bit files are being made.

The only deficiency is still that I cannot use vectors for device signal
mappings, but I am willing to work around that for now.

Thanks,
Brian